1. Field of the Invention
The present invention is directed to an improved voltage controlled amplifier and, more specifically, to a voltage controlled amplifier which minimizes differential gain and distortion.
2. Description of the Related Art
Amplification of electrical signals by a desired gain can be achieved using a voltage controlled amplifier (VCA), which uses a control voltage to determine the gain of the amplifier. FIG. 1 shows an example of a high performance current in/current out VCA 10 with a voltage gain control. The input port 38 receives an input signal from current source 12. The output, which is an amplification of input 12, is provided at port 14. For purposes of this patent, amplification is defined to include gain and/or attenuation and the definition of gain shall include both gain and attenuation. Additionally, the definition of "port" includes an input or output to the VCA circuit which may or may not be an internal node to a larger circuit. Control ports 16 and 18 are voltage inputs which are used to determine the amount of gain (or attenuation) for circuit 10. The gain core of circuit 10 consists of a differential pair of matched PNP transistors 20 and 22, and a differential pair of matched NPN transistors 24 and 26. Input port 38 is connected to the collectors of transistors 20 and 24. Output port 14 is connected to the collectors of transistors 22 and 26. The bases of transistors 20 and 26 are connected to voltage control 16 and, the bases of transistors 22 and 24 are connected to voltage control 18.
The signal input 12 is connected to the inverting input of amplifier 28 whose output drives the center tap 40 of resistor pair 30 and 32. The resistor pair modulates the tail currents of transistor pairs 20, 22 and 24, 26. The result of this action is that input port 38 is maintained at virtual ground as signal current is applied to input port 38. The voltages on control ports 16 and 18 determine the gain and, thus, the size of the signal that appears on output 14. Increasing the voltage on port 16 will cause the output signal to increase (gain will increase). Increasing the voltage on control port 18 will cause the output signal to decrease (gain will decrease or attenuation). The output current from port 14 can be used directly or converted to a voltage by connecting it to the virtual ground of a current/voltage converter. Current sources 34 and 36 are used to provide the DC bias.
The circuit of FIG. 1 has several important features and performance virtues. First, it has complimentary control inputs (e.g. 16 and 18). Second, if the control voltages are positioned near ground, the gain core transistors all have small collector to base voltages, which reduces the thermal effects that modulate the base to emitter voltages and cause distortion. Third, the circuit of FIG. 1 has virtual ground input and output structures that facilitate signal summing and aids in maintaining a wide bandwidth.
However, the prior art does have some shortcomings, especially when used in a video application. Amplifier 28 has to provide much larger voltage swings at node 40 than are found at the other nodes of the circuit. This necessitates that amplifier 28 have a fair amount of complexity to obtain the voltage gain and output voltage swings that are symmetrical about ground, which in turn limits the bandwidth of the circuit.
An even bigger problem involves distortion and gain differential. The circuit of FIG. 1 would work ideally if transistors 20, 22, 24 and 26 were identical in all respects. However, as can be seen, transistors 20 and 22 are PNP, while transistors 24 and 26 are NPN. For most complementary bipolar integrated circuit processes, the NPN and PNP transistors are dissimilar enough in terms of bulk emitter and series base resistance to cause poor distortion and differential gain/phase performance particularly over gain and attenuation. In order to better understand the present invention, this problem is described in greater detail with respect to video circuits.
When designing circuits for the video environment, the DC compliance range for the DC component of an NTSC signal is +/-0.710 volts. Thus, amplifier circuits with fixed gains are rated based on the change of gain of the amplifier circuit as it operates over the DC compliance range (-0.71 V to +0.710 V). FIG. 2A shows a typical plot of gain over the DC compliance range. As can be seen, the gain varies depending on the DC component of the video signal. In this example, highest gain is shown at 0.71 V, the positive edge of the DC compliance range, and lowest gain is at 0 volts DC. The difference between the highest gain and the lowest gain over the DC compliance range is known as the differential gain of the circuit. Differential gain is measured in percentages.
When a signal with an AC component is amplified, there tends to be a shift in phase between the output signal and the input signal. FIG. 2B shows a typical plot of phase changes over the DC compliance range. As can be seen, the greatest phase change occurs between the positive edge of the DC compliance range and 0 volts DC. The difference between the highest phase change and the lowest phase change is called the differential phase of the circuit. Differential phase is measured in degrees. The smaller the differential gain and differential phase, the higher the performance of the circuit.
FIGS. 2A and 2B show differential gain and phase, respectively, for an amplifier circuit which has a fixed gain. As discussed above, a VCA has a variable gain, controlled by the control voltage. For each gain value of a VCA there is a corresponding differential gain and differential phase. Thus, for each gain value of a VCA there is a separate set of graphs corresponding to FIGS. 2A and 2B. FIG. 2C shows a plot of differential gain on the vertical axis versus variable gain setting on the horizontal axis for the prior art VCA. As can be seen, at unity gain (gain equals 1.0) the differential gain is at a minimum, approximately 0.071%. As the gain is increased, differential gain increases significantly. Typical gains for video applications range from 100 to 1 or more. Even when the gain ranges from 0.5 to 2, the differential gain may become too large for high performance video applications. For example, for the circuit of FIG. 1: at gain=2, differential gain=0.46% and, at gain=0.5, differential gain=0.40%. A large differential gain can cause the VCA to operate with a deviation in the gain, resulting in a video picture that is not clear or as sharp as desired.
The differential gain is caused, in part, by the difference in the parasitics of the gain core transistors. FIG. 3A and 3B are symbolic representations of a PNP transistor and an NPN transistor, respectively, showing their parasitic resistances. FIG. 3A shows a PNP transistor with parasitic resistance r.sub.cp at its collector, a parasitic resistance r.sub.ep at its emitter and a parasitic resistance r.sub.bp at its base. FIG. 3B shows an NPN transistor with parasitic resistances r.sub.cn at its collector, a parasitic resistance r.sub.en at its emitter, and a parasitic resistance r.sub.bn at its base. An ideal transistor would not have parasitic resistances. However, realities of today's technology dictates that these parasitic resistances need to be taken into account in high performance situations. The problem arises mostly because the parasitic resistances at the emitters and bases of PNP transistors and NPN transistors (r.sub.ep, r.sub.bp and r.sub.en, r.sub.bn) are dissimilar enough to cause high differential gain and distortion. For example, at unity gain the currents through all four transistors of the gain core in the circuit of FIG. 1 are similar and the voltage drops across the parasitic resistors are the same. Therefore, differential gain and distortion are at tolerable levels. But when the circuit of FIG. 1 deviates from unity gain, the current flowing through the transistors 20-24 varies and the differential gain and distortion levels increase to intolerable levels, causing undesirable degradation of the video picture over the allowed DC compliance range.